Search - fir vhdl

[Other resource] fir-vhdl

Description: 用Vhdl硬件描述语言编写的FIR数字滤波器-Vhdl using Hardware Description Languages in preparing the FIR digital filter
Platform: | Size: 5335 | Author: MAX | Hits:

[Other] fir

Description: 只是一个8阶的fir滤波器，希望对大家有用-Only an 8-band fir filters, useful for all of us hope
Platform: | Size: 407552 | Author: yyl | Hits:

[VHDL-FPGA-Verilog] fir

Description: 利用VHDL语言，设计了一个11阶的FIR滤波器。简单易懂-The use of VHDL language, designed a 11-order FIR filter. Easy to understand. .
Platform: | Size: 1024 | Author: 关小 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: FIR of 1024 stage. 面向alteraFPGA器件设计-FIR of 1024 stage
Platform: | Size: 157696 | Author: 佴立峰 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: fir filter design using vhdl codes
Platform: | Size: 1024 | Author: gowtham | Hits:

[VHDL-FPGA-Verilog] fir

Description: 16阶FIR VHDL程序并附带testbench，并有简单流水线设计！-16 Tap FIR vhdl code with testbench and pipelining design
Platform: | Size: 352256 | Author: hongwan | Hits:

[VHDL-FPGA-Verilog] FIR

Description: FIR滤波器的VHDL源代码及测试文件，已通过编译仿真，绝对正确。-FIR filter VHDL source code and test files, has passed the compiled simulation, absolutely correct.
Platform: | Size: 4096 | Author: 周州 | Hits:

Description: 先用matlab得到所需滤波器的系数，将AD采样的数据经过fir滤波器后输出-First to use matlab to obtain the required filter coefficients, data from the AD sample, after the output filter through the fir
Platform: | Size: 2262016 | Author: 潘存华 | Hits:

[VHDL-FPGA-Verilog] fir-c2h

Description: 基于fpga的fir滤波器的设计非常好，谢谢大家分享-fir filter design base on fpga it is very good
Platform: | Size: 11264 | Author: gary | Hits:

[VHDL-FPGA-Verilog] FIR

Description: FIR结构数字滤波器，64阶。在Altera FPGA上验证通过-FIR digital filter structure, 64 bands. Verified by the Altera FPGA on the
Platform: | Size: 5120 | Author: 蓝晶 | Hits:

[VHDL-FPGA-Verilog] fir

Description: Verilog编的fir滤波器，可以自己输入参数序列，产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms
Platform: | Size: 1024 | Author: lifei | Hits:

[VHDL-FPGA-Verilog] fir

Description: 数字电路设计中的，fir滤波器设计，我做的是8位宽的，利用vhdl实现，附带了完整的代码，报告，我没有对我的信息进行删除，是希望大家能够诚实的利用这个代码，提高自身本领。-Digital circuit design, fir filter design, I am doing is 8 bits wide, using vhdl implementation, with a complete code, the report, I did not delete my information in the hope that we can use this code for an honest to improve their skills.
Platform: | Size: 3322880 | Author: de de | Hits:

[Other] fir

Description: 是一个fir滤波器其中使用了MAC单元去实现累加和乘法运算。-A fir filter which uses the MAC unit to achieve accumulation and multiplication.
Platform: | Size: 1024 | Author: 张晓东 | Hits:

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[Other resource] fir-vhdl

[Other] fir

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] FIR

[DSP program] fir

[VHDL-FPGA-Verilog] fir-c2h

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] fir

[Other] fir

[VHDL-FPGA-Verilog] FIR-filter-vhdl

[VHDL-FPGA-Verilog] FIR-filter-using-fpga-design

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] FPGA-FIR

[VHDL-FPGA-Verilog] FIR-lv-bo-code

[VHDL-FPGA-Verilog] VHDL-Example-2

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